Integrated floating power transfer device with logic level control and method

ABSTRACT

A switch control circuit ( 416, 402, 418, 422 ) and method are provided for transistor-implemented switches ( 405, 413, 408, 414 ) of an integrated floating power transfer device ( 400, 500 ). The device includes a floating bus ( 403, 410 ) driven by a power system which includes a charge pump circuit ( 419, 408, 414, 420 ). At least one switch circuit ( 405, 413 ) is coupled to the floating bus and the power system for facilitating charging of the floating bus. The switch control circuit ( 416, 402, 418, 422 ) includes a level shifting circuit ( 402 ) for adjusting a control signal to the at least one switch circuit notwithstanding floating of an input voltage signal thereto to facilitate operation of the switch circuit.

This application claims the benefit of U.S. Provisional Application No.60/427,410, filed Nov. 18, 2002, as well as U.S. Provisional ApplicationNo. 60/427,422, filed Nov. 18, 2002. Each of these provisionalapplications is hereby incorporated by reference herein in its entirety.

The present invention relates in general to power transfer devices, andmore particularly, to a switch control circuit and method with dynamiclogic level control adjustment for transistor-based switches of anintegrated floating power transfer device.

Many system designs include power conversion circuitry to develop arequired operating voltage. One such power conversion circuit is knownas a charge pump. A charge pump is a device for creating increases insupply voltage or for inverting a supply voltage to generate a splitsupply. Many of these devices are related to applications usingnon-volatile memory circuits, which require a high voltage forprogramming. In a conventional charge pump power conversion circuit, theload device connects so that one terminal thereof is common to one ofthe supply terminals, typically the ground reference. U.S. Pat. No.4,807,104 discloses a power conversion circuit which is both a voltagemultiplying and inverting charge pump. However, the output of the powerconversion circuit remains referenced to the ground node.

In certain system implementations, it may be advantageous to power thesystem using a floating power transfer device. By floating the powertransfer device, if a terminal in the system were to short, then thesystem may still be able to continue to operate. For example, in anautomobile bus network, the signaling portion of the system on the buscould be floating relative to any other reference, such as ground orbattery positive. This would provide enhanced fault tolerance byallowing communications to still occur notwithstanding a short at aterminal thereof.

The shortcomings of the prior art are overcome and additional advantagesare provided by the provision of a floating power transfer device whichincludes a floating bus, and a power system for driving the floatingbus. The power system includes a charge pump circuit. The device furtherincludes at least one switch circuit coupled to the floating bus and thepower system for facilitating charging of the floating bus, and at leastone switch control circuit for controlling switching of the at least oneswitch circuit. In operation, a voltage signal at an input of the atleast one switch circuit comprises a floating signal, and the at leastone switch control circuitry includes a level shifting circuit fordynamically adjusting a logic level control signal to the at least oneswitch circuit to facilitate operation of the at least one switchcircuit.

In another aspect, a circuit is provided which includes a first switchcircuit for electrically coupling to a high side bus node of a floatingbus, and a second switch circuit for electrically coupling to a low sidebus node of the floating bus, wherein the first switch circuit and thesecond switch circuit comprise complementary circuits for controllingcharging of the floating bus by a power system. The first switch circuitemploys a first reference signal and the second switch circuit employs asecond reference signal, both of which are floating when the firstswitch circuit and the second switch circuit are ON. The circuit furtherincludes at least one switch control circuit for controlling switchingof the first switch circuit and the second switch circuit. The at leastone switch control circuit includes devices for dynamically adjustinglogic level control signals to the first switch circuit and to thesecond switch circuit to facilitate operation thereof and provideprotection to the first switch circuit and the second switch circuit.

In a further aspect, a method of controlling powering of an integratedfloating power transfer device is provided. This method includes:providing a first switch circuit for electrically coupling to a highside bus node of a floating bus and a second switch circuit forelectrically coupling to a low side bus node of the floating bus,wherein the first switch circuit and the second switch circuit comprisecomplementary switch circuits for controlling charging of the floatingbus by a power system; providing, when in use, a first reference signalfor the first switch circuit and a second reference signal for thesecond switch circuit, wherein the first reference signal and the secondreference signal are both floating when the first switch circuit and thesecond switch circuit are ON; and providing a first logic level controlsignal to the first switch circuit and a second logic level controlsignal to the second switch circuit, wherein the first logic levelcontrol signal and the second logic level control signal are bothtranslated control signals relative to a value of at least one of thefloating first reference signal and the floating second referencesignal, to facilitate operation of the first switch circuit and thesecond switch circuit and provide protection thereto.

Additional features and advantages are realized through the techniquesof the present invention. Other embodiments and aspects of the inventionare described in detail herein and are considered a part of the claimedinvention.

The subject matter which is regarded as the invention is particularlypointed out and distinctly claimed in the claims at the conclusion ofthe specification. The foregoing and other objects, features, andadvantages of the invention are apparent from the following detaileddescription taken in conjunction with the accompanying drawings inwhich:

FIG. 1 is a schematic of one embodiment of a power transfer device;

FIG. 2 is a schematic of one embodiment of a floating power transferdevice;

FIG. 3 is a schematic of one embodiment of a transistor-based,integrated circuit implementation of a floating power transfer device;

FIG. 4 is a schematic of one embodiment of an integrated floating powertransfer device having a logic level control circuit providing dynamicvoltage adjustment for a given logic level to be applied totransistor-based switches, in accordance with an aspect of the presentinvention; and

FIG. 5 is a schematic of an alternate embodiment of an integratedfloating power transfer device which enables the dual function of powerand data transfer on the floating bus, and has a logic level controlcircuit providing dynamic voltage adjustment for a given logic level tobe applied to the transistor-based switches, in accordance with anaspect of the present invention.

Reference is now made to the drawings, wherein the same referencenumbers used throughout different figures designate the same or similarcomponents. One embodiment of a power transfer device for powering aload 105 is shown in FIG. 1. In this charge transfer embodiment, thereis shown at least one common connection between the two supply domainsallowing voltage inversion or voltage doubling, in addition to simplevoltage isolation. The circuit operates by transferring charge from thegrounded 108 power supply 107, through switch 101, onto a firstreservoir capacitor CS 103. The state of switch 101 is controlled by asignal source V_SW1 109, which creates a pulse waveform for controllingthe switch. Charge accumulated on capacitor CS 103 is transferred to anoutput capacitor CH 104 by enabling a second switch 102, which iscontrolled by a second signal source V_SW2 106. A continuous supply ofpower to load 105 is facilitated by providing correct pulse sequencesfrom signal sources 106 and 109. The final output voltage across load105 primarily depends on the switching frequency of signal sources 106and 109, as well as the value of the reservoir capacitor CS 103, and thecurrent through the load 105. The basic charge transfer circuit of FIG.1 shows a well-known technique used in voltage conversion circuits forsubstrate biasing and high-voltage generation used in programming E²ROMdevices.

A “floating supply” is a power-supply that has no direct connection to alocal ground reference. A battery may be used to accomplish this, but itsuffers from a limited lifetime. Alternatively, a transformer may beused to transfer AC power, which is then rectified to create a floatingDC supply. This would require the generation of an AC signal, from theassumed existence of a DC voltage-supply, with sufficient strength todeliver the required power into the floating load. For certainapplications, transformers are considered undesirable and bulky so othersolutions are necessary. In these cases, an integrated solution isadvantageous.

A floating supply version of the circuit of FIG. 1 is depicted in FIG.2. In this version, an additional pair of switches is provided toisolate the ground reference 108 from the load 105. This charge transferdevice delivers charge onto capacitor CS 103 through switches 101, 110under control of a signal generator V_SW1 109. Charge is provided by apower-supply voltage (V_DC) 107, one side of which is referenced toground 108. Capacitor CH 104 provides the modified power supply for load105. Capacitor 104 is charged from the voltage of capacitor CS 103 whenswitches 102, 111 are closed by a second signal generator V_SW2 106. Thefloating supply circuit of FIG. 2 allows node CS− to float during thecharge transfer between capacitor CS 103 and capacitor CH 104. Switch110 isolates the CS− node from ground. It is possible for the loadnegative (FS−) to float to any voltage relative to the ground reference,while power to the load 105 is delivered through the switch network.

In one embodiment, an integrated circuit (IC) implementation of thefloating supply can replace the switches with MOS transistors. The rangethat the load may float in such a circuit would be limited by arequirement that the IC substrate be connected to the most negativevoltage, and the most positive connection should not exceed the junctionbreakdown voltage of the transistors. These requirements limit thevoltage isolation possible using conventional CMOS processes.

A floating charge transfer circuit such as shown in FIG. 2 can be usedfor signal transfer functions within a limited voltage range restrictedby the ground reference supply voltage. Another approach is depicted inFIG. 3, wherein the circuit is used to transfer a mixture of data andpower to a floating bus, denoted by CAN_H and CAN_L. With this circuit,a two wire ‘controller area network’ (CAN) driver is created. Thisapparatus can use DMOS switch transistors instead of MOS transistor baseswitches. A DMOS device can tolerate larger voltages across the switchterminals, thereby allowing the switch to operate beyond the normalsupply limits.

To restate, FIG. 3 is an integrated circuit implementation of a floatingpower transfer device with a combined power and data feature. In thisimplementation, switches 101, 110 and 102, 111 of FIG. 2 are replacedbyDMOS transistors 301, 310 and 302, 311, which are P type and N typetransistors. These devices require the addition of diodes 317, 318, 319,320 to maintain the isolation of the floating bus CAN_H and CAN_L fromthe source voltage 107 and ground 108. Signal generators 106, 109 nowrequire additional complementary control sources 109 b, 106 b to drivethe P-type DMOS transistor switches 301, 302 (with the N-type DMOStransistor switches 310, 311 being driven by control sources 109, 106,respectively). Typically, the control sources are driven by digitalsignals, biased at the prevailing logic-supply voltage, with the samephasing as described above in connection with the floating powertransfer device of FIG. 2.

Power is again available in this implementation from the floatingcircuit due to energy retained by the hold capacitor CH 104. Capacitor313 is depicted as an example of signal capacitance, which is isolatedfrom the floating bus by resistors R_0 and R_1. Resistors R_2 and R_3represent parasitic resistances representative of a certain leakagecurrent through the system. Transistor 302 b is shown in this embodimentas a way of enhancing the ON switch resistance of the device. Thistransistor enables the switch to be ON for starting up the system. Whenthe voltage across CAN_H is low, meaning that the voltage acrosscapacitor 104 is low, transistor 302 b is used at startup to delivercharge onto capacitor 104. This startup transistor is optional dependingupon the particular implementation.

Operationally, when a signal appears on the floating bus during the dataphase, it may drive the bus voltage to 0V or some other predeterminedintermediate value. For the remainder of this phase, the bus is held atthat value. At the commencement of the power-phase, the bus transistorswitches 302, 311 turn on and the bus voltage is restored to the powerlevel. In this system, the speed at which the bus voltage changes isdependent in the impedance of the switches 302, 311 and diodes 318, 319conducting current from the hold capacitor onto the floating bus.

In one aspect, provided herein is a power transfer device which deliverspower from a DC supply to a floating DC supply with active components ofthe circuit designed within a single integrated circuit. This approacheliminates the need for a transformer to provide a supply that isindependent of the local ground reference. One application of thiscircuit would allow the development of in-car systems that can remainfunctional in the presence of a short between one floating supplyterminal and any other power supply present within the car. Such adevice is able to deliver sufficient power into the load of the floatingsystem to maintain a supply voltage that is constant for the purposes ofthe load devices. In practice, the voltage may show a ripple as thereservoir capacitors are recharged and the average voltage may vary asthe load changes. Suitable choice of external capacitor values isanticipated to keep variation within acceptable bounds.

FIG. 4 depicts one embodiment of an integrated floating power transferdevice having logic level control circuitry in accordance with aspectsof the present invention. Advantageously, this circuit provides afloating supply that is capable of positive and negative variation withrespect to the local ground over a greater range than is possible usingstandard (C)MOS circuits. The output may be used in either a “supplyonly” or a dual “supply and signaling” scheme. The circuit incorporateslogic level based inputs to control all switching devices. This isachieved using a level-shifting circuit that is capable of transferringlogic signals relative to the floating reference node. Further, thecircuit of FIG. 4 disables the output switches 405, 413 when the voltageon the reservoir capacitor 420 is insufficient to supply the output.This allows the reservoir capacitor to be precharged without the chargeleaking through the output switch devices. Diodes 404 and 412 are shownconnected between switches 405 and 413 and output nodes 403 and 410,respectively. This placement of diodes improves on the priorimplementation of FIG. 3 by ensuring that the switch transistor 405 and413 sources are connected to the nodes CSH+ 406 and CSH− 409. The gatesof these switches are driven by a level translation block 418. Thisblock derives its power supply from the same nodes (CSH+, CSH−), asexplained further below, so that the gate levels are referenced to thesame supply levels as the sources. The use of DMOS transistor switcheswithin the circuit allows the floating range of operation to bedetermined by the drain-source breakdown voltage of the DMOStransistors. In certain technologies, this may be significantly largerthan existing supply voltages and can include protection against shortsto AC power sources as well as DC sources. A ground based logic blockprovides an interface to a microprocessor or other internal or externallogic circuit. This logic may generate a simple timing sequence, inwhich case the final load voltage may vary as the load current changes,or it may adjust the timing sequence to provide regulation of the loadvoltage. Further, the circuit of FIG. 4 can operate with a power supplyvoltage which is greater than the gate breakdown voltage of the switchDMOS transistors.

As noted, FIG. 4 depicts one embodiment of a circuit 400 for generatinga floating DC power supply. This circuit allows the operation of theswitch devices that facilitate power transfer from a grounded 424reference DC supply 419 to the floating load 417. One feature of thiscircuit is that timing signals are generated by a logic block 416 thatis driven off a local logic-supply 415, and uses a common groundreference 425. The logic supply voltage can be any value that isacceptable for the intended application, usually between 2.7V −5V. Thelogic interface signals 423 may be connected externally to somecontrolling device, or internally to other integrated circuit logicelements.

Control signals of sufficient voltage level are needed to control theDMOS switch transistors to maximize sufficient transfer of charge to theload. Each of the four DMOS transistors 405, 408, 413, 414 of thecircuit of FIG. 4 requires a unique control signal. The power supplyvoltage 419 may be higher than the gate breakdown voltage of the DMOSswitch transistors. Control signals are translated in the circuit tosignal levels that are limited to voltages that lie within theacceptable operating range of the DMOS transistor gates. The leveltranslators 418, 422 provide outputs that do not exceed the gatebreakdown voltage when driven by the normal logic level on the input.The P-DMOS switches 405, 408 require a gate signal that is referenced tothat device's source terminal. In the case of switch 408, the gatecontrol voltage ranges between V_BAT and V_BAT-V_(GATE(MAX)), it doesnot swing to ground unless V_BAT is less than V_(GATE(MAX)) For theN-DMOS switch 414, the gate control signal varies between 0V andV_(GATE(MAX)). As used herein, the term V_(GATE(MAX)) is a symbolicrepresentation of a physical limitation normally present in MOSsemiconductor devices, such that a voltage applied to the gate terminalthat is greater than V_(GATE(MAX)) would cause damage to the device.

While switches 408, 414 are driven by ground reference signals that aretranslated to an appropriate gate drive level by level translation block422, the switches on the floating side 405, 413 need to be driven fromsignals referenced to nodes CSH+ 406 and CSH− 409. A level translationblock 418 provides a similar function as block 422, except that it isreferenced to node CSH− 409 and powered from node CSH+ 406. The logiclevel input to level translation block 418 is no longer referenced toground. Thus, an additional level shifting circuit 402 is provided toperform dynamic level shifting between the two voltage domains. Thiscircuit can transfer a logic level signal while the reservoir capacitorCS 420 is switched between the grounded supply and the floating supply.It can accommodate offsets of either positive or negative voltages.Further details of level shifting circuits are provided in U.S. Pat. No.6,452,418, as well as the above-incorporated U.S. provisionalapplication No. 60/427,422, entitled “Level Shifting Circuit BetweenIsolated Systems”.

Certain integrated circuit (IC) processes create an implicit reversebiased diode between the source and drain terminals of the DMOSswitches. When this is the case, as in the embodiment of FIG. 4,blocking diodes 404, 407, 411, 412 are inserted between the switches andthe output nodes. In the circuit example of FIG. 3, diodes 318, 319 andDMOS devices 302, 311 are shown transposed. The embodiment of FIG. 4 isan improvement over that circuit because of an improved gate controlfacilitated by positioning the DMOS source terminals at the samepotential as the reservoir capacitor 420, i.e., at nodes CSH− 409 andCSH+ 406. The level translation block 418 that drives the gates ofswitches 405 and 413 also has its power supply connections between CSH−and CSH+. Operationally, when signal SWGND of control logic 416 is alogic one, then level translation block 422 provides an appropriategating signal to switches 408 and 414 to turn ON and deliver charge fromgrounded power supply 419 onto the reservoir capacitor CS 420 throughdiodes 407 and 411. Once the desired voltage is generated across thereservoir capacitor 420, power is switched from the reservoir capacitor420 to a holding capacitor 421 which will power floating load 417.

Switches 413, 405 are on the floating side of the power transfer deviceand are referenced to nodes CSH− and CSH+. The control signals whichdrive these two transistors can be generated in the same way as fortransistors 408 & 414, however, the reference for the level translationblock is derived from across the capacitor 420, such that capacitor 420looks like the power supply for level translation block 418. In thisway, the control signal into block 418 is not relative to ground. Levelshifting block 402 provides translation of the digital input controlsignal relative to a chosen floating supply value, in this case, CSH−.When the correct gate drive voltages for transistors 405 and 413 areestablished, the transistors switch ON transferring charge fromreservoir capacitor 420 to holding capacitor 421 through diodes 404 and412. Once charge is available on capacitor 421, the floating load may bepowered.

In FIG. 4, a power on reset circuit 401 is also provided which ensuresthat the switches are not turned ON while the voltage across thereservoir capacitor 420 is insufficient to maintain power control of thedevices. For example, if the voltage across the reservoir capacitor isless than a predetermined value, then the power on reset logic will notprovide an ENABLE signal back to the level shifting block 402, whichincludes an AND circuit that requires the ENABLE signal to be present inorder for a logic level one control signal to be provided to leveltranslation block 418.

In one practical implementation, reservoir capacitor 420 and floatingsupply capacitor 421 of FIG. 4 may be external to the integratedcircuit, though other embodiments could employ on-chip capacitors.

The circuit 500 shown in FIG. 5 extends the concepts of FIG. 4 to allowoutput nodes FS+ 403 and FS− 410 to form part of a switched bus scheme(similar to the circuit of FIG. 3 discussed above). Capacitor 421 inthis example is smaller and cannot be used to retain the charge requiredfor the floating supply. Thus, an additional diode 526 and capacitor 527provide the reservoir required by the floating supply. Diode 526prevents capacitor 527 from discharging while the bus voltage across FS+403 and FS− 410 is lower than the voltage FSUP across the floating load517. In this example, floating load 517 may include the supply to thecircuits that create the bus signals between nodes FS+ and FS−.

Power on reset (POR) block 401 again monitors the voltage level acrossreservoir capacitor 420. If POR 401 detects that a voltage has fallenbelow a specified level, then it is able to switch off the output DMOSswitches 405, 413 to protect against additional leakage of charge out ofthe reservoir capacitor 420. This can be used to protect the input DMOSswitches 408, 414 from excessive power dissipation, which may occur witha low voltage on the reservoir capacitor 420.

Additional variations to the circuit embodiments described above mayinclude other configurations of diodes and switches. One such examplewould connect the sources of all switches to their respective terminalson the reservoir capacitor 420. Another alternative embodiment wouldmove the source connections of switches 405 and 413 from the CSH+ andCSH− nodes to the floating supply nodes FS+ and FS−, respectively.

Although preferred embodiments have been depicted and described indetail herein, it will be apparent to those skilled in the relevant artthat various modifications, additions, substitutions and the like can bemade without departing from the spirit of the invention and these aretherefore considered to be within the scope of the invention as definedin the following claims.

1. A device comprising: a floating bus; a power system for driving thefloating bus, the power system comprising a charge pump circuit; atleast one switch circuit coupled to the floating bus and the powersystem for facilitating charging of the floating bus; at least oneswitch control circuit for controlling switching of the at least oneswitch circuit; and wherein a voltage signal at an input of the at leastone switch circuit is floating, and wherein the at least one switchcontrol circuit includes a level shifting circuit for adjusting acontrol signal level to the at least one switch circuit to facilitateoperation of the at least one switch circuit.
 2. The device of claim 1,wherein the at least one switch circuit comprises at least onetransistor-based switch circuit, and wherein the voltage signalcomprises a source input to the at least one transistor-based switchcircuit, and the control signal comprises a gate input to the at leastone transistor-based switch circuit.
 3. The device of claim 2, whereinthe at least one switch circuit comprises a first switch circuit and asecond switch circuit, the first switch circuit comprising at least oneP type transistor circuit, and the second switch comprising at least oneN type transistor circuit, and wherein the first switch circuit and thesecond switch circuit comprise complementary circuits.
 4. The device ofclaim 1, wherein the at least one switch control circuit furthercomprises a level translation circuit, the level shifting circuitadjusting an input control signal to the level translation circuit basedon a potential of the floating voltage signal.
 5. The device of claim 1,wherein the power system comprises a power and data system, and whereinoutput of the device is across the floating bus and comprises both afloating power output and a floating signal output.
 6. The device ofclaim 1, wherein the floating bus comprises a floating DC bus, andwherein the device comprises an integrated circuit employing multipletransistor and diode pairs.
 7. The device of claim 1, wherein the powersystem further comprises a reservoir capacitor, and wherein the voltagesignal comprises a potential across the reservoir capacitor, and thelevel shifting circuit adjusts the control signal level with referenceto the potential at one terminal of the reservoir capacitor.
 8. Thedevice of claim 7, further comprising a power on reset protectioncircuit for monitoring the potential across the reservoir capacitor, andif the potential falls below a specified level, then for switching offthe at least one switch circuit to inhibit leakage of charge from thereservoir capacitor.
 9. The device of claim 1, wherein the floating buscomprises a balanced bus system having a high side bus node and a lowside bus node, and wherein the at least one switch circuit comprises afirst switch circuit and a first diode connected to the high side busnode and a second switch circuit and a second diode connected to the lowside bus node.
 10. A circuit comprising: a first switch circuit forelectrically coupling to a high side bus node of a floating bus, and asecond switch circuit for electrically coupling to a low side bus nodeof the floating bus, wherein the first switch circuit and the secondswitch circuit comprise complementary circuits for controlling chargingof the floating bus by a power system, and wherein a first referencesignal for the first switch circuit and a second reference signal forthe second switch circuit are floating when the first switch circuit andthe second switch circuit are ON; and at least one switch controlcircuit for controlling switching of the first switch circuit and thesecond switch circuit, the at least one switch control circuit includinglogic for adjusting a control signal level to the first switch circuitand to the second switch circuit to facilitate operation thereof andprovide protection to the first switch circuit and the second switchcircuit.
 11. The circuit of claim 10, wherein the power system comprisesa charge pump circuit, the circuit and the charge pump circuitcomprising an integrated circuit.
 12. The circuit of claim 10, whereinsaid logic comprises a level shifting circuit for adjusting the controlsignal level to the first switch circuit and to the second switchcircuit relative to the floating of at least one of the first referencesignal and the second reference signal.
 13. The circuit of claim 12,wherein the logic further comprises a level translation circuit coupledto the level shifting circuit, the level translation circuit providingan appropriate logic level control signal to the first switch circuitand to the second switch circuit.
 14. A method comprising: (i) providinga first switch circuit for electrical coupling to a high side bus nodeof a floating bus and a second switch circuit for electrical coupling toa low side bus node of the floating bus, wherein the first switchcircuit and the second switch circuit comprise complementary switchcircuits for controlling charging of the floating bus by a power system;and (ii) providing, when in use, a first reference signal to the firstswitch circuit and a second reference signal to the second switchcircuit, wherein the first reference signal and the second referencesignal are both floating when the first switch circuit and the secondswitch circuit are ON; and (iii) providing a first control signal levelto the first switch circuit and a second control signal level to thesecond switch circuit, wherein the first control signal level and thesecond control signal level are translated control signals relative to avalue of at least one of the floating first reference signal and thefloating second reference signal, to facilitate operation of the firstswitch circuit and the second switch circuit and provide protectionthereto.
 15. The method of claim 14, wherein the power system comprisesa charge pump circuit and wherein the providing (i) comprises providingthe first switch circuit and the second switch circuit as an integratedcircuit with the charge pump circuit.
 16. The method of claim 14,wherein the power system comprises a reservoir capacitor, and whereinthe first reference signal comprises a potential at a first node of thereservoir capacitor and the second reference signal comprises a secondpotential at a second node of the reservoir capacitor.
 17. The method ofclaim 14, wherein said providing (i) comprises providing the firstswitch circuit as a P type transistor and diode circuit and the secondswitch circuit as an N type transistor and diode circuit, and furthercomprising electrically coupling the first switch circuit to the highside bus node of the floating bus and the second switch circuit to thelow side bus node of the floating bus.
 18. A circuit comprising: a firstswitch circuit for electrically coupling to a high side bus node of afloating bus, and a second switch circuit for electrically coupling to alow side bus node of the floating bus, wherein the first switch circuitand the second switch circuit comprise complementary circuits forcontrolling charging of the floating bus by a power system; means forproviding a first reference signal to the first switch circuit and asecond reference signal to the second switch circuit, wherein the firstreference signal and the second reference signal are both floating whenthe first switch circuit and the second switch circuit are ON; and meansfor providing a first control signal level to the first switch circuitand a second control signal level to the second switch circuit, whereinthe first control signal level and the second control signal level areboth translated control signals relative to a value of at least one ofthe floating first reference signal and the floating second referencesignal, to facilitate operation of the first switch circuit and thesecond switch circuit and provide protection thereto.